## BM2305 DIGITAL SIGNAL PROCESSING Lecture Notes for BME - Fifth (5th) Semester

BM2305 Lecture Notes

Syllabus :

UNIT I FINITE IMPULSE RESPONSE (FIR) FILTER
Introduction to FIR filter - phase delay and group delay – linear phase transfer function.
Design of FIR filter using Fourier method, Rectangular window, Hanning window,
Hamming window, Kaiser window. Design using frequency sampling technique. Structure
realization of FIR system – direct form, cascade form, linear phase FIR system.

UNIT II INFINITE IMPULSE RESPONSE (IIR) FILTER
Introduction to IIR filter - Impulse-invariant transformation technique – Bilinear
transformation technique – frequency transformation in digital domain - design of
Butterworth filter and Chebyshev filter (type-1) (restricted to 3rd order). Structure realization
of IIR system – lattice structure and lattice-ladder structure.

UNIT III FINITE WORD LENGTH EFFECT IN FIR AND IIR FILTER 8
Quantization of fixed-point and floating-point numbers – product quantization – variance
estimation of quantization error – finite word length effect on IIR filter – Product
quantization error in IIR filter – mathematical analysis of steady state output noise –
dynamic scaling to prevent overflow – limit-cycle oscillation in recursive system –
rounding-off error in DFT and FFT computation.

UNIT IV BASICS OF RANDOM SIGNAL PROCESSING
(ONLY QUALITATIVE ANALYSIS)
Introduction to probability function, joint probability, conditional probability – estimation
parameters – joint distribution function, probability density function, ensemble average –
mean squared value, variance, standard deviation, moments, correlation, covariance,
orthogonality, auto-covariance, auto-correlation, cross-covariance and cross-correlation –
stationarity – ergodic – white noise – energy density spectrum – power density spectrum
estimation – periodogram – direct method, indirect method, Barlett method – Welch
method. Decimator (down sampling) – frequency-domain analysis of decimator –
interpolation (up sampling) – frequency-domain analysis of interpolator

UNIT V INTRODUCTION TO DIGITAL SIGNAL PROCESSORS
Programmable DSP – multiplier accumulator – over-flow and under-flow in MAC unit –
Van-Neumann architecture – Harvard architecture – cache memory – pipelining –
computer configuration – RISC – CISC – addressing modes – replication – TMS320
processor – first to fifth generation (only block diagram approach) – architecture and
features.

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