EE2258 LINEAR AND DIGITAL INTEGRATED CIRCUITS LABORATORY Syllabus(Common to EEE, EIE & ICE) Fourth(4th) Semester - Anna University B.E. - Regulation 2008


EE2258 LINEAR AND DIGITAL INTEGRATED CIRCUITS LABORATORY

(Common to EEE, EIE & ICE)

AIM
To study various digital & linear integrated circuits used in simple system configuration.
1. Study of Basic Digital IC’s. (Verification of truth table for AND, OR, EXOR, NOT, NOR, NAND,
JK FF, RS FF, D FF)
2. Implementation of Boolean Functions, Adder/ Subtractor circuits.
3 (a) Code converters, Parity generator and parity checking, Excess-3, 2s
Complement, Binary to Gray code using suitable IC’s .
(b) Encoders and Decoders: Decimal and Implementation of 4-bit shift registers in
SISO, SIPO, PISO, PIPO modes using suitable IC’s.
4. Counters: Design and implementation of 4-bit modulo counters as synchronous and
Asynchronous types using FF IC’s and specific counter IC.
5 Shift Registers:
Design and implementation of 4-bit shift registers in SISO, SIPO, PISO, PIPO
modes using suitable IC’s.
Study of 4:1; 8:1 multiplexer and Study of 1:4; 1:8 demultiplexer
6 Timer IC application:
Study of NE/SE 555 timer in Astable, Monostable operation.
7. Application of Op-Amp:
Slew rate verifications, inverting and non-inverting amplifier,
Adder, comparator, Integrater and Differentiator.
9 Study of Analog to Digital Converter and Digital to Analog Converter: Verification
of A/D conversion using dedicated IC’s.
10 Study of VCO and PLL ICs:
i. Voltage to frequency characteristics of NE/ SE 566 IC.
ii. Frequency multiplication using NE/SE 565 PLL IC.
P = 45 TOTAL = 45 PERIODS


DETAILED SYLLABUS

1. Study of Basic Digital IC’s.
(Verification of truth table for AND, OR, EXOR, NOT, NOR, NAND, JK FF, RS FF,
D FF)
Aim
To test of ICs by using verification of truth table of basic ICs.
Exercise
Breadboard connection of ICs with truth table verification using LED’s.


2. Implementation of Boolean Functions, Adder/ Subtractor circuits.
[Minimizations using K-map and implementing the same in POS, SOP from using basic
gates]
Aim
Minimization of functions using K-map implementation and combination
Circuit.
Exercise
1. Realization of functions using SOP, POS, form.
2. Addition, Subtraction of atleast 3 bit binary number using basic gate IC’ s.


3a) Code converters, Parity genertor and parity checking, Excess 3, 2s Complement,
Binary to grey code using suitable ICs .
Aim
Realizing code conversion of numbers of different bar.
Exercise
1 Conversion Binary to Grey, Grey to Binary;
1’s. 2’s complement of numbers addition, subtraction,
2. Parity checking of numbers using Gates and with dedicated IC’s


3b) Encoders and Decoders: Decimal and Implementation of 4-bit shift registers in
SISO, SIPO,PISO,PIPO modes using suitable ICs.
Exercise
1. Decimal to binary Conversion using dedicated ICs.
2. BCD – 7 Segment display decoder using dedicated decoder IC& display.
4. Counters: Design and implementation of 4-bit modulo counters as synchronous
and asynchronous types using FF IC’s and specific counter IC.
Aim
Design and implementation of 4 bit modulo counters.
Exercise
1. Using flipflop for up-down count synchronous count.
2. Realization of counter function using dedicated ICs.


5. Shift Registers:
Design and implementation of 4-bit shift registers in SISO, SIPO, PISO, PIPO
modes using suitable IC’s.
Aim
Design and implementation of shift register.
Exercise
1. Shift Register function realization of the above using dedicated IC’s
For SISO, SIPO, PISO, PIPO, modes of atleast 3 bit binary word.
2. Realization of the above using dedicated IC’s.


6. Multiplex/ De-multiplex.
Study of 4:1; 8:1 multiplexer and Study of 1:4; 1:8 demultiplexer
48
Aim
To demonstrate the addressing way of data channel selection for multiplex De-multiplex
operation.
Exercise
1. Realization of mux-demux functions using direct IC’s.
2. Realization of mux-demux using dedicated IC’s for 4:1, 8:1, and vice versa.


7. Timer IC application. Study of NE/SE 555 timer in Astable, Monostable operation.
Aim
To design a multi vibrater circuit for square wave and pulse generation.
Exercise
1. Realization of Astable multivibrater & monostable multivibrater circuit using
Timer IC.
2. Variation of R, C, to vary the frequency, duty cycle for signal generator.


8. Application of Op-Amp-I
Slew rate verifications, inverting and non-inverting amplifier,
Adder, comparator, Integrater and Differentiator.
Aim
Design and Realization of Op-Amp application.
Exercise
1. Verification of Op-Amp IC characteristics.
2. Op-Amp IC application for simple arithmetic circuit.
3. Op-Amp IC application for voltage comparator wave generator and wave
shifting circuits.


9. Study of Analog to Digital Converter and Digital to Analog Converter: Verification of
A/D conversion using dedicated IC’s.
Aim
Realization of circuit for digital conversions.
Exercise
1. Design of circuit for analog to digital signal conversion using dedicated IC’s.
2. Realization of circuit using dedicated IC for digital analog conversion.


10. Study of VCO and PLL ICs

i) Voltage to frequency characteristics of NE/ SE 566 IC.
ii) Frequency multiplication using NE/SE 565 PLL IC.
Aim
Demonstration of circuit for communication application
Exercise
1. To realize V/F conversion using dedicated IC’s vary the frequency of the
generated signal.
2. To realize PLL IC based circuit for frequency multiplier, divider.





Requirement for a batch of 30 students
S.No. Description of Equipment Quantity
required
Quantity
available
Deficiency
%
1. Interface such as, A/D, D/A converter,
DMA, PIC Serial, Interface,
Temperatures controller, Stepper
motor, Key board
4 each
2. CRO and function generator 3 each
3. IC trainer Kit 15
4. Analog AC trainer kit 4
5. Components and bread boards 10 each
6. Chips IC – 7400 10
7. Chips IC – 7402 10
8. Chips IC – 7408 10
9. Chips IC – 7432 10
10. Chips IC – 7410 25
11. Chips IC – 555 10
12. Chips IC – 741 10
13. Chips IC – 74153 10
14. Chips IC – 7474 10
15. Chips IC – 7490 10
16. Chips IC – 7447 10
17. Chips IC – 7476 10
18. Chips IC – 7420 10
19. Chips IC – 7404 15
20. Chips LM – 317 10
50
S.No. Description of Equipment Quantity
required
Quantity
available
Deficiency
%
21. Chips LM – 723 10
22. Chips MA – 7840 10
23. Chips LM – 380 10
24. Chips ICL - 8038 10
25. Traffic light control kit 2
26. VDU 2
27. 7 segment Display 5
28. Interfacing card such as keyboard etc. 3 each
29. Work tables 15

Anna university Nov/Dec 2013 Results Jan 2014 Results

All Rights Reserved Anna University Exam Time table May/June 2014 - iAnnauniversity |
| My Google+ Profile | Find us on Google+