VLSI DESIGN 2010 anna university question paper. (eee dpt)

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PART A-(10*2=20marks)

1)What is BiCMOS devicse?
2)What are the factors that contribute for the threshold voltage of MOSFET?
3)What is the super buffer?Give an applicatipn.
4)What do you understand by lamda based rules?
5)Sketch the NOR implementaion of an NMOS 4 to 1 MUX.
6)Compare static CMOS and Dynamic CMOS in terms of its application.
7)What are the logics used in the implementation of NMOS PLA?
8)When does a PLA become Finite State Machine(FSM)?
9)What is entity?Give an example.
10)State the difference between the transport delay and inertial relay?

PART B-(5*16=80marks)

11)(a)Derive expression for drain current in saturation and lineor regions(16)
or
(b)(i)Draw and explain the small signal model f MOS transistor.(6)
(ii)Explain the fabrication process of NMOS device.(10)

12)(a)Draw and explain passive load NMOS inverter and active load NMOS inverter.Draw their stick
diagrams.
or
(b)(i)Draw the diagram of NMOS superbuffer and explainm(8)
(b)Draw the circuit of BiCMOS inverter and explain.(8)

13)(a)(i)Draw the circit of 2input NAND gate using static CMOS design and explain.(8)
(ii)What is the barrel shifter?Also explain its working with a neat circuit of 4*4 barrel
shifter.(8)
or
(b)(i)Draw the circuit of dynamic CMOS logic and explain its operation.(8)
(ii)Write a note on Tally circuits.(8)

14)(a)With a neat diagram,explain the architecture of any FPGA device with its programmable
interconnect.(16)
or
(b)(i)Draw and expain the dynamic logic array(DLA).compare its with PLA.(8)
(ii)Sketch the structure of PLA and explain.(8)

15)(a)Write a structural level program for 4bit adder using VHDL.(16)
or
(b)Explain the various signal assignment staements in VHDL.(16)

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